The present invention relates to a board that has connection terminals formed on both the top and back surfaces thereof and on which electronic circuit parts are to be mounted.
A wiring board 21 for mounting electronic circuit parts, as shown in FIG. 8, for example, is known as one conventional printed circuit board for mounting a bare chip like a flip chip or a package like a BGA (Bump Grid Array).
This type of wiring board 21 has a substrate 22 that has conductor layers formed on both the top and back surfaces by mainly a subtractive method. A parts mounting area is provided in the center of the top surface of the substrate 22. Formed densely in this area are multiple pads 23 which constitute a first pad group. The individual pads 23 correspond to bumps BP positioned on the bottom of a bare chip C1.
Multiple pads 24 which constitute a second pad group are formed on the peripheral portion of the back of the substrate 22. Formed on those pads 24 are bumps 25 as projecting electrodes for connection to a mother board. Multiple through holes 26 are formed through the substrate 22 at the peripheral portion of the substrate 22. Those through holes 26 are connected to the pads 23 on the top surface via a conductor pattern 27, which is formed on the top surface of the substrate 22. The through holes 26 are also connected to the pads 24 on the back surface via a conductor pattern 28, which is formed on the back surface of the substrate 22. Accordingly, the first group of pads 23 are electrically connected to the second group of pads 24 respectively on this wiring board 21.
According to the conventional wiring board 21, as shown in FIG. 8, wires temporarily led out to the peripheral portion on the top surface are led back toward the center on the back surface. The wires for connecting the pads 23 to the pads 24 therefore are longer than necessary, resulting in a poor wiring efficiency. The use of this wiring board 21 makes it difficult to increase the speed of signal transmission between electronic circuit parts to be mounted and the mother board.
To connect the pads 23 and 24 together by the shortest wires, the through holes 26 may be formed in the center portion of the board, not the peripheral portion thereof. In this case, however, dead space where wiring is not possible is formed in the portion where the through holes 26 are formed. Thus, to secure wiring space, the board itself would inevitably become larger.
With regard to another conventional wiring board 60 illustrated in FIG. 9, signal lines 62 connected to pads 61 have a given width irrespective of the positions of the signal lines. In this case, it is necessary to set the widths of the signal lines 62 smaller, so that the wiring resistance is likely to increase and line disconnection is apt to occur. This reduces the reliability of the wiring board 60.
There is a proposed solution to this shortcoming, in which each signal line 62 consists of a first wiring pattern 62b with a predetermined width and a second wiring pattern 62a having a width greater than that of the first wiring pattern 62b, as shown by two-dot chain lines in FIG. 9. In this case, the first wiring patterns 62b are arranged at a high wiring-density portion and the second wiring patterns 62a are arranged at a low wiring-density portion to facilitate the wiring and suppress the occurrence of line disconnection.
Since the first wiring pattern 62b is directly connected to the associated second wiring pattern 62a in this case, two sharp corners are formed at the connected portion. Stress is apt to concentrate on those corners, which raises another problem that cracks 64 are easily formed in a permanent resist 63 near the corners as shown in FIG. 10.
With a view to solving the above-mentioned problems, the present invention has been accomplished, and it is a primary objective of the present invention to improve the wiring efficiency while avoiding the enlargement of the entire board. Further, it is another objective of this invention to improve the wiring efficiency while suppressing an increase in the wiring resistance and the occurrence of line disconnection and preventing the occurrence of cracks in a permanent resist.
To achieve the above objectives, a board for mounting electronic circuit parts according to one aspect of this invention comprises:
a first connection terminal group including a plurality of connection terminals densely formed over a top surface of a substrate having through holes formed therein;
a second connection terminal group including a plurality of connection terminals formed at at least a peripheral portion of a back surface of the substrate, the first connection terminal group being connected to the second connection terminal group via the through holes;
a build-up multilayer interconnection layer formed on the top surface of the substrate and including at least one conductor layer and at least one insulator layer alternately stacked one on another,
the at least one insulator layer having a plurality of via holes for electric connection of the at least one conductor layer electrically connected to the through holes; and
wherein the first connection terminal group is formed on an outermost layer of the build-up multilayer interconnection layer.
The first connection terminals are densely formed on the substrate and the second connection terminals are formed discretely. The first connection terminals are connected to the second connection terminals via the via holes as well as the through holes. It is therefore possible to shorten the wires without producing dead space and improve the wiring efficiency. This feature can provide a device which is equipped with electronic circuit parts and has an improved processing speed.
According to another aspect of this invention, there is provided a board for mounting electronic circuit parts, comprising a plurality of connection terminals and a plurality of signal lines formed on an insulator layer. The plurality of connection terminals are formed densely and are respectively connected to said signal lines.
Each of the signal lines include a plurality of wiring patterns with different widths and a taper-shaped pattern connecting said wiring patterns with the different widths so as to have a continuously changing width. Each of the signal lines has a smaller width at an area having a relatively high wiring density than at an area having a relatively low wiring density.
Since each signal line is so formed that it has a smaller width at an area having a relatively high wiring density than at an area having a relatively low wiring density, it is possible to form a wiring pattern having narrow line widths in the high wiring density area and having wide line widths in the low wiring density area. This suppresses the resistance and prevents line disconnection. It is also possible to secure the insulation between patterns in the high wiring density area.
Because wiring patterns with different widths can be connected by the taper-shaped pattern, insulation between signal lines can be secured without causing cracks in the permanent resist and the wiring resistance is not increased.